November 6th, 2015
The big sensor of the image
At conference on semi-conductor chips (ISSCC) specialists from Massachusetts Institute of Technology told about the sensor of the image executed on the CMOS technologies with application of technology of big assembly.
The product made with observance of norms of 0,35 microns, has permission of 1024×1024 pixels (1 Megapixel). Researchers say that such products can be connected воединыжды to massifs, receiving sensors of bigger permission. Among areas of introduction it is called, namely, the prospecting equipment and security systems.
The big structure of the sensor is created from 7 layers, the connected boundaries by itself interlaminar communications. Actually, photosensitive elements as which photo diodes act, are in the first layer. Having removed from this layer all other components, developers could provide factor of filling of a useful area to 100 %. In the 2nd layer there are the selection and reading chains realized on the SOI-CMOS technologies. On remained 5 "floors" analog-digital converters (64 pieces, 12-digit, konveyerizovanny), the synchronization scheme, the address decoder, the interface and other auxiliary blocks took place. The sensor is equipped with the tire I2C and 2 12-digit LVDS interfaces having capacity of 512 Mbps.
Source: EE Times